HLASM - BNZR = Branch on Not Zero Register

The opcode of the BNZR extended mnemonic is X'07' with mask B'0111'.

The mask is the third hex digit of the instruction, and - though this is uncommon - can be regarded as the third hex digit of the opcode as well.


  1. Perform a branch if the condition code is not 0 or B'00', meaning "zero"
  2. Condition code 0 may occur after bit operations, such as TM, indicating all tested bits were zero, after some logical operations as NI, indicating a zero result, or after some arithmetic operations such as SR, indicating a zero result without borrow/overflow.


  1. Register holding the destination address.


  1. The processor uses the PSW's two-bit condition code as an index into the 4-bit condition mask.
  2. If the selected mask-bit is one, then it branches to the address specified in the argument. If the bit is zero, then the processor continues with the next instruction.
  3. The condition code does not change.

Special Cases

  1. If the destination address is in register 0 no branch will be taken.

Related Instructions

  1. BNER is a synonym for the BNZR mnemonic.
  2. BNZ branches to a location that is directly addressable in base-displacement form.
  3. BCR is the real instruction associated with this extended mnemonic.


  1. All hardware supports the BNZR instruction.


  1. The PSW's Amode setting determines how many bits are used for the destination address.


         YREGS                          * Define register names
         SR    R6,R1                    * Subtract from total
         BNZR  R14                      * Ok: return to caller
* Handling the zero case:

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