HLASM - BNER = Branch on Not Equal Register
The opcode of the BNER extended mnemonic is X'07' with mask B'0111'.
The mask is the third hex digit of the instruction, and - though this is
uncommon - can be regarded as the third hex digit of the opcode as well.
- Perform a branch if the condition code is not 0 or B'00', meaning
- Condition code 0 may occur after compare operations, such as
CLC, indicating the first operand was equal to the
- Register holding the destination address.
- The processor uses the PSW's two-bit condition code as an index into the
4-bit condition mask.
- If the selected mask-bit is one, then it branches to the address
specified in the argument. If the bit is zero, then the processor
continues with the next instruction.
- The condition code does not change.
- If the destination address is in register 0 no branch will be taken.
- BNZR is a synonym for the BNER mnemonic.
- BNE branches to a location that is directly
addressable in base-displacement form.
- BCR is the real instruction associated with this
- All hardware supports the BNER instruction.
- The PSW's Amode setting determines how many bits are used for the
YREGS * Define register names
CR R1,R6 * Limit reached?
BNER R14 * Yes: return to caller
* Handle table-full condition:
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