High Level Assembler - Opcodes overview, Extension Sets EC50-EC5F

The table below lists all documented extended mnemonics for instructions:

Opcode Mnemonic Description Table Type
EC51 RISBLG Rotate then Insert Selected Bits Low from Grande Extended Mnemonics
EC54 RNSBG Rotate then aNd Selected Bits Grande Extended Mnemonics
EC55 RISBG Rotate then Insert Selected Bits Grande Extended Mnemonics
EC56 ROSBG Rotate then Or Selected Bits Grande Extended Mnemonics
EC57 RXSBG Rotate then eXclusive or Selected Bits Grande Extended Mnemonics
EC59 RISBGN Rotate then Insert Selected Bits Grande No cc change Extended Mnemonics
EC5D RISBHG Rotate then Insert Selected Bits High from Grande Extended Mnemonics

Each extended mnemonic links to a text section with some additional info on the pertinent pseudo opcode.

Opcode Assignments.

Remark:
Please note that the creation of descriptions for all individual instructions is an ongoing process. As yet no such descriptions have been created for the opcodes on this page.

Extended Mnemonics for instructions in extension sets EC50-EC5F

All instructions in this table are six bytes in length. The first byte always has a value of X'EC', the second byte of the opcode is located in the sixth byte of the instruction and has a value in the range from X'50' through X'5F'.

Extended Mnemonics for RISBLG (Rotate then Insert Selected Bits Low from Grande)

Opcode Operand Pattern Mnemonic Description
EC51 [00.9F.20] LLHFR Load Low from High Fullword Register
EC51 [10.9F.20] LLHLHR Load Logical Halfword Low from High Register
EC51 [18.9F.20] LLCLHR Load Logical Character Low from High Register
EC51 [--.9F.20-] SRLLH Shift Right Logical Low from High
EC51 [--.|80.--] RISBLGZ Rotate then Insert Selected Bits Low from Grande with Zeroing
EC51 [00.9F-.20+] SLLLH Shift Left Logical Low from High

 

Extended Mnemonics for RNSBG (Rotate then aNd Selected Bits Grande)

Opcode Operand Pattern Mnemonic Description
EC54 [00.1F.00] NHHR aNd High with High Register
EC54 [00.1F.20] NHLR aNd High with Low Register
EC54 [20.3F.20] NLHR aNd Low with High Register
EC54 [|80.--.--] RNSBGT Rotate then aNd Selected Bits Grande for Test only

 

Extended Mnemonics for RISBG (Rotate then Insert Selected Bits Grande)

Opcode Operand Pattern Mnemonic Description
EC55 [--.|80.--] RISBGZ Rotate then Insert Selected Bits Grande with Zeroing

 

Extended Mnemonics for ROSBG (Rotate then Or Selected Bits Grande)

Opcode Operand Pattern Mnemonic Description
EC56 [00.1F.00] OHHR Or High with High Register
EC56 [00.1F.20] OHLR Or High with Low Register
EC56 [20.3F.20] OLHR Or Low with High Register
EC56 [|80.--.--] ROSBGT Rotate then Or Selected Bits Grande for Test only

 

Extended Mnemonics for RXSBG (Rotate then eXclusive or Selected Bits Grande)

Opcode Operand Pattern Mnemonic Description
EC57 [00.1F.00] XHHR eXclusive-or High with High Register
EC57 [00.1F.20] XHLR eXclusive-or High with Low Register
EC57 [20.3F.20] XLHR eXclusive-or Low with High Register
EC57 [|80.--.--] RXSBGT Rotate then eXclusive or Selected Bits Grande for Test only

 

Extended Mnemonics for RISBGN (Rotate then Insert Selected Bits Grande No cc change)

Opcode Operand Pattern Mnemonic Description
EC59 [--.|80.--] RISBGNZ Rotate then Insert Selected Bits Grande No cc change with Zeroing

 

Extended Mnemonics for RISBHG (Rotate then Insert Selected Bits High from Grande)

Opcode Operand Pattern Mnemonic Description
EC5D [00.9F.00] LHHR Load High from High Register
EC5D [00.9F.20] LHLR Load High from Low Register
EC5D [10.9F.00] LLHHHR Load Logical Halfword High from High Register
EC5D [10.9F.20] LLHHLR Load Logical Halfword High from Low Register
EC5D [18.9F.00] LLCHHR Load Logical Character High from High Register
EC5D [18.9F.20] LLCHLR Load Logical Character High from Low Register
EC5D [--.1F.00-] SRLHH Shift Right Logical High from High
EC5D [--.1F.20-] SRLHL Shift Right Logical High from Low
EC5D [--.|80.--] RISBHGZ Rotate then Insert Selected Bits High from Grande with Zeroing
EC5D [00.1F-.--] SLLHH Shift Left Logical High from High
EC5D [00.1F-.20+] SLLHL Shift Left Logical High from Low

 

 

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