HLASM - SPM = Set Program Mask

The opcode of the SPM instruction is X'04'.


  1. Restore the condition code and program mask to a saved value, usually after execution of a routine that might have changed their values.
  2. Set the program mask to specify how the processor is to deal with the associated program interruptions.


  1. Register holding the new Condition Code and Program Mask.


  1. The processor uses bits 2-3 of the argument to set the PSW's condition code and bits 4-7 to set the PSW's program mask, which determines how the processor handles certain program exceptions.
  2. The condition code receives the value specified in the argument.

Special Cases

  1. None.

Related Instructions

  1. IPM is the preferred instruction for extracting the current program mask form the PSW.
  2. BALR can be used also to extract the current program mask form the PSW.


  1. All hardware supports the SPM instruction.


  1. The relevant bits of the argument are located in the high-order byte of the 32-bit register. These are usually derived from a BALR in Amode 24 or an IPM.


         YREGS                          * Define register names
SAVESTAT IPM   R2                       * Save current status
* Now that PSW status has been saved, we can change the program mask:
* Bit 0 = 0 to ignore fixed point overflow conditions
* Bit 1 = 0 to ignore decimal overflow exceptions
* Bit 2 = 1 to catch HFP exponent underflow
* Bit 3 = 1 to catch HFP significance exceptions
         LA    R1,X'03'                 * CC=0, Program Mask=B'0111'
         SPM   R1                       * Activate new program mask
         SPM   R2                       * Restore status to saved state

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