High Level Assembler - Extended Mnemonics for LOCR instruction

The table below lists all documented extended mnemomics for instruction LOCR (Load On Condition Register). Each extended mnemonic links to a text section with some additional info on the pertinent pseudo opcode.

Opcode Assignments.

Remark:
Please note that the creation of descriptions for all individual instructions is an ongoing process. As yet no such descriptions have been created for the opcodes on this page.

Extended Mnemonics for LOCR

All instructions in this table are four bytes in length. The first two bytes always have a value of X'B9F2', the first half of the third byte is the mask to be used for determining whether or not to execute the load. This mask designates the exact pseudo opcode.

B9F2 0 1 2 3 4 5 6 7 8 9 A B C D E F
      LOCRH
LROCH
  LOCRL
LROCL
  LOCRNE
LROCNE
  LOCRE
LROCE
  LOCRNL
LROCNL
  LOCRNH
LROCNH
     

 

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