High Level Assembler - Opcodes overview, Extension set A7

The table below lists all documented opcodes in extension set A7 for IBM mainframe processors. Each opcode links to a text section with some additional info on the pertinent opcode.

Opcode Assignments.

Remark:
Please note that the creation of descriptions for all individual instructions is an ongoing process. As yet no such descriptions have been created for the opcodes on this page.

Extension Set A7 - Halfword Immediate

Entries with a slightly darker background are no longer supported on current mainframe hardware and/or not supported by IBM's current version of HLASM. The associated mnemonics are printed in italics.
All instructions in this table are four bytes in length. The first byte always has a value of X'A7', the second half of the second byte designates the exact instruction.
Extension sets have no associated mnemonic. These are denoted by their opcode in hexadecimal notation. These link to additional opcode tables.

A7 0 1 2 3 4 5 6 7 8 9 A B C D E F
  TMH
TMLH
TML
TMLL
TMHH TMHL BRC
X'A7m4'
JC
BRAS
JAS
BRCT
JCT
BRCTG
JCTG
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