HLASM - BMR = Branch on Mixed / Minus Register
The opcode of the BMR extended mnemonic is X'07' with mask B'0100'.
The mask is the third hex digit of the instruction, and - though this is
uncommon - can be regarded as the third hex digit of the opcode as well.
BMR is used both for Branch on Minus Register and for
Branch on Mixed Register
- Perform a branch if the condition code is 1 or B'01', meaning either
"minus" or "mixed".
- Condition code 1 may occur after bit operations, such as
TM. After boolean operations (and, or,
exclusive or) condition code 1 means mixed or all ones.
- Condition code 1 may also occur after signed binary calculations, such as
AR. Do not use after multiplication or division, since
these do not set the condition code.
- Register holding the destination address.
- The processor uses the PSW's two-bit condition code as an index into the
4-bit condition mask.
- If the selected mask-bit is one, then it branches to the address
specified in the second argument. If the bit is zero, then the processor
continues with the next instruction.
- The condition code does not change.
- If the destination address is in register 0 no branch will be taken.
- BLR is a synonym for the BMR mnemonic.
- BM branches to a location that is directly
addressable in base-displacement form.
- BCR is the real instruction associated with this
- All hardware supports the BMR instruction.
- The PSW's Amode setting determines how many bits are used for the
YREGS * Define register names
TM FIELD,MASK * Check bit settings
BMR R14 * Ok, Return
AR R6,R1 * Add to total
BMR R11 * Go handle negative result
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