HLASM - BLHR = Branch on Low or High Register
The opcode of the BLHR extended mnemonic is X'07' with mask B'0110'.
The mask is the third hex digit of the instruction, and - though this is
uncommon - can be regarded as the third hex digit of the opcode as well.
- Perform a branch if the condition code is either 1 or B'01', meaning
"low", or 2 or B'10' meaning "high".
- Condition code 1 may occur after compare operations, such as
CLC, indicating the first operand was lower than the
- Condition code 2 may occur after compare operations, such as
CLC, indicating the first operand was higher than the
- Register holding the destination address.
- The processor uses the PSW's two-bit condition code as an index into the
4-bit condition mask.
- If the selected mask-bit is one, then it branches to the address
specified in the second argument. If the bit is zero, then the processor
continues with the next instruction.
- The condition code does not change.
- If the destination address is in register 0 no branch will be taken.
- BLH branches to a location that is directly
addressable in base-displacement form.
- BCR is the real instruction associated with this
- All hardware supports the BLHR instruction.
- The PSW's Amode setting determines how many bits are used for the
- HLASM does not support the BLHR mnemonic, but some other assemblers
do. For use with HLASM a simple macro can be used instead.
YREGS * Define register names
&LABEL BLHR ®
&LABEL BCR B'0110',® * BR on Low or High condition
CR R1,R6 * Limit reached?
BLHR R14 * No: return to caller
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