HLASM - BC = Branch on Condition
The opcode of the BC instruction is X'47'.
This instruction implements the IF function by conditionally skipping
a part of the program's logic. Alternatively it can be used to build a loop
by branching back.
- Conditionally branch forward to skip some logic.
- Conditionally branch backward to repeat some logic.
- Select a logic path by means of a branch table.
- 4-bit condition mask (in the instruction).
- destination address (index, base, displacement).
- The processor uses the PSW's two-bit condition code as an index into the
4-bit condition mask.
- If the selected mask-bit is one, then it branches to the address
specified in the second argument. If the bit is zero, then the processor
continues with the next instruction.
- The condition code does not change.
- BCR branches to a location that is specified
in a register.
- BRC branches to a location whose address is
specified relative to the current instruction address.
- BRCL branches to a location whose address is
specified relative to the current instruciotn address.
- BCTR is intended for creating loops.
- BXLE and BXH are intended
for scanning tables.
- All hardware supports the BC instruction.
- The PSW's Amode setting determines how many bits are used for the
- HLASM supports various so-called extended mnemonics that
have an implied mask value. For an overview please refer to the
list of extended mnemonics for BC.
- Some instructions will alter the condition code in the PSW, some won't.
When a BC instruction tests the condition code, it may have been set by
the preceding instruction, or it may have remained unchanged during the
execution of the last few instructions. Thus, it is possible that the
condition code was set quite a few instructions before being tested by the
current BC instruction.
YREGS * Define register names
BC B'1000',R5 * Branch in case....
BC B'1111',R14 * Return to caller
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